XF86_Accel(1)

NAME
XF86_Accel - accelerated X Window System servers for UNIX on x86 and Alpha platforms with an S3, Mach8, Mach32, Mach64, P9000, AGX, ET4000/W32, ET6000, I128, TGA, or 8514/A accelerator board

SYNOPSIS
XF86_S3 [:displaynumber] [ option ] ...

XF86_S3V [:displaynumber] [ option ] ...

XF86_Mach8 [:displaynumber] [ option ] ...

XF86_Mach32 [:displaynumber] [ option ] ...

XF86_Mach64 [:displaynumber] [ option ] ...

XF86_P9000 [:displaynumber] [ option ] ...

XF86_AGX [:displaynumber] [ option ] ...

XF86_W32 [:displaynumber] [ option ] ...

XF86_I128 [:displaynumber] [ option ] ...

XF86_TGA [:displaynumber] [ option ] ...

XF86_8514 [:displaynumber] [ option ] ...

DESCRIPTION
XF86_S3 is an 8-bit PseudoColor, 16-bit TrueColor and 32-bit TrueColor server for S3 graphic accelerator boards. Note, 16-bit and 32-bit operation is not supported on all S3 accelerator boards. Refer to README.S3 for details of which boards are supported at which depths.

XF86_S3V is an 8-bit PseudoColor and 16-bit TrueColor server for S3 ViRGE and ViRGE/VX graphic accelerator boards.

XF86_Mach8 is an 8-bit PseudoColor server for ATI Mach8 graphic accelerator boards.

XF86_Mach32 is an 8-bit PseudoColor and 16-bit TrueColor server for ATI Mach32 graphic accelerator boards. Note, 16-bit operation is not supported on all Mach32 accelerator boards. Refer to README.Mach32 for details of which RAMDACs are supported at which depths.

XF86_Mach64 is an 8-bit PseudoColor, 16-bit TrueColor, and 32-bit TrueColor server for ATI Mach64 graphic accelerator boards. Note, 16-bit and 32-bit operation is not supported for all RAMDACs. Refer to README.Mach64 for details of which RAMDACs are supported at which depths.

XF86_P9000 is an 8-bit PseudoColor, 16-bit TrueColor, and 32-bit TrueColor server for Weitek Power 9000 (P9000) graphic accelerator boards.

XF86_AGX is an 8-bit PseudoColor and 16-bit TrueColor server for AGX/XGA graphic accelerator boards.

XF86_W32 is an 8-bit PseudoColor server for ET4000/W32, ET4000/W32i, ET4000/W32p and ET6000 graphic accelerator boards. For 16, 24 and 32 bits per pixel support on the ET6000, try the XF86_SVGA server.

XF86_I128 is an server for Number Nine Imagine 128 graphic accelerator boards.

XF86_TGA is an server for Digital's 21030 (TGA) chipset. This server is available only for Alpha platforms.

XF86_8514 is an 8-bit PseudoColor server for 8514/A graphic accelerator boards.

These are derived from the X386 server provided with X11R5, and from the X8514 server developed by Kevin Martin <martin@cs.unc.edu>.

CONFIGURATIONS

The servers support the following chipsets:

    XF86_S3:
        86C911, 86C924, 86C801, 86C805, 86C805i, 86C928, 86C928-P, 86C732 (Trio32), 86C764 (Trio64), 86C765 (Trio64V+), 86C864, 86C868, 86C964, 86C968

    XF86_S3V:
        86C325 (ViRGE), 86C375 (ViRGE/DX), 86C385 (ViRGE/GX), 86C988 (ViRGE/VX)

    XF86_Mach8:
        ATI Mach8, ATI Mach32

    XF86_Mach32:
        ATI Mach32

    XF86_Mach64:
        ATI Mach64 (GX, CT, ET, VT, GT, 3D Rage II, 3D Rage II+DVD, Rage Pro)

    XF86_P9000:
        Diamond Viper VLB, Diamond Viper PCI, Orchid P9000, and some clones (Weitek P9000)

    XF86_AGX:
        AGX-010, AGX-014, AGX-015, AGX-016, XGA-1, XGA-2

    XF86_W32:
        ET4000/W32, ET4000/W32i, ET3000/W32p, ET6000

    XF86_I128:
        Number Nine Imagine 128 series 1 and 2

    XF86_TGA:
        DEC 21030

    XF86_8514:
        IBM 8514/A and true clones

For S3 virtual resolutions up to (approximately) 1152x800 are supported, using (up to) 1Mb of display memory (the S3 uses an internal width of 1280 for some older chips, hence 1Mb can't support 1152x900). Physical resolutions up to 1280x1024 (1600x1280 on some cards) are possible using 2Mb or more of display memory (virtual resolution is dependent solely on the amount of memory installed, with the maximum virtual width being 2048, and max virtual height is 4096).

Similar resolutions are supported on the Mach64. Refer to README.Mach64 for configuration details.

Similar resolutions are supported on the Mach32. For the Mach32, the maximum virtual width is 1536, and the maximum virtual height is 1280.

For Mach8, the maximum virtual width is 1024.

For 8514 the maximum resolution is 1024x768.

For the AGX chips, maximum resolution depends upon the chip revision and amount of available display memory. Refer to README.agx for configuration details.

For the P9000, the virtual and physical resolutions must be the same. With sufficient memory, resolutions up to 1280x1024 are supported.

All the servers which support 24 bit visuals currently do so using a 32 bit per pixel configuration where 8 bits in every 32 bits is unused. This needs to be taken into account when calculating the maximum virtual display size that can be supported at this depth.

OPTIONS
In addition to the normal server options described in the Xserver(1) manual page, these servers accept some more command line switches, as described in the XFree86(1) manpage.

The Mach64, Mach32, S3, S3V, P9000 and AGX servers support more than 8 bit color. The Mach32, S3V and AGX servers support 16 bit TrueColor and the Mach64, S3, I128, and P9000 servers support 16 and 32 bit TrueColor. The 32 bit TrueColor mode only uses 24 bits per pixel for color information (giving you 16 million colors). These modes may be used by specifying the -bpp option as specified in the XFree86(1) manpage.

SETUP
XFree86 uses a configuration file called XF86Config for its initial setup. See the XF86Config(4/5) manpage for general details. Here only the parts specific to the XF86_S3, XF86_S3V, XF86_Mach8, XF86_Mach32, XF86_Mach64, XF86_P9000, XF86_AGX, XF86_W32, XF86_TGA, XF86_I128, and XF86_8514 servers are explained.

Entries for the Device section in the XF86Config file include:

Chipset "name"
    specifies a chipset so the correct driver can be used. Possible chipsets are:

    XF86_S3:

    s3_generic
        (for a standard IO driven server)

    mmio_928
        (for a memory mapped IO driven server on 86C928, 86C732, 86C764, 86C864, 86C868, 86C964 and 86C968 boards)

    newmmio
        (for a newer memory mapped IO driven server on 86C765, 86C868, and 86C968 boards)

    XF86_S3V:

    s3_virge

    XF86_Mach8:

    mach8
        (to force the Mach8 server to run on Mach32 boards)

    XF86_Mach32:

    mach32

    XF86_Mach64:

    mach64

    XF86_P9000:

    vipervlb (for the Diamond Viper VLB)

    viperpci
        (for the Diamond Viper PCI)

    orchidp9000
        (for the Orchid P9000 and many generic P9000-based boards)

    XF86_AGX:

    agx-016

    agx-015

    agx-014

    agx-010

    xga-2

    xga-1
        (note: Only the agx-016, agx-015, agx-014 and XGA-2 have been tested. Refer to README.agx before attempting to use.)

    XF86_W32:

    et4000w32

    et4000w32i

    et4000w32i_rev_b

    et4000w32i_rev_c

    et4000w32p_rev_a

    et4000w32p_rev_b

    et4000w32p_rev_c

    et4000w32p_rev_d

    et6000

    XF86_I128:

    i128

    XF86_TGA:

    tga

    XF86_8514:

    ibm8514

Clocks clock ...
    For boards with non-programmable clock chips, the clocks can be specified here (see XF86Config(4/5)). The P9000 server no longer requires a Clocks line. It will work the same way as other servers with a programmable clock chip (i.e., use the clocks as specified in the Modes). Note, clocks over 110 Mhz are not recommended or supported by the P9000 server. The Mach64 server also does not require a Clocks line since the clocks are normally read directly from the video card's BIOS or programmed as required. For the Mach64 server, the clocks given in the XF86Config file are ignored unless the "no_bios_clocks" option is given (see below).

ClockChip "clockchip-type"
    For boards with programmable clock chips (except with the P9000 and AGX servers), the name of the clock chip is given. The only supported values for the W32 server are "icd2061a", "dcs2834", "ics5341" and "stg1703". Possible values for the S3 server include "icd2061a", "ics9161a", "dcs2834", "sc11412", "s3gendac", "s3_sdac", "ti3025", "ti3026", "ti3030", "ics2595", "ics5300", "ics5342", "ch8391", "stg1703", "att20c408", "att20c409", "att20c499", and "ibm_rgb5xx". Possible values for the Mach64 server include "ati18818", "ics2595", "stg1703", "ch8398", "ibm_rgb514" and "att20c408". The only possible clockchip value for the ET6000 is "et6000".

Ramdac "ramdac-type"
    This specifies the type of RAMDAC used on the board. Only the S3, AGX, Mach32, Mach64, and W32 servers use this.

    normal - (S3, AGX, W32) Card does not have one of the other RAMDACs mentioned here. This option is only required for the S3 server if the server incorrectly detects one of those other RAMDACs. The AGX server does not yet auto-detect RAMDACs, this is the default if no RAMDAC is specified. Use this option for W32 server if it incorrectly identifies your RAMDAC or if RAMDAC detection fails entirely.

    att20c490 - (S3, AGX, Mach32) Card has an AT&T 20C490 or AT&T 20C491 RAMDAC. When the dac_8_bit option is specified, these RAMDACs may be operated in 8 bit per RGB mode. It also allows 16bpp operation with 801/805/928 boards. True AT&T 20C490 RAMDACs should be auto-detected by the S3 server. This RAMDAC must be specified explicitly in other cases. Note that 8 bit per RGB mode does not appear to work with the Winbond 82C490 RAMDACs (which SuperProbe identifies as AT&T 20C492). 16bpp works fine with the Winbond 82C490. The Diamond SS2410 RAMDAC is reported to be compatible when operating in 15bpp mode (not 16bpp). The Chrontel 8391 appears to be compatible in all modes.

    sc15025 - (S3, AGX) Card has a Sierra SC15025 or SC15026 RAMDAC. The S3 server has code to auto-detect this RAMDAC.

    sc11482 - (S3) Card has a Sierra SC11482, SC11483 or SC11484 RAMDAC. The S3 server has code to auto-detect this RAMDAC.

    sc11485 - (S3) Card has a Sierra SC11485, SC11487 or SC11489 RAMDAC. The S3 server will detect these RAMDACs as a sc11482, so this option must be specified to take advantage of extra features (they support 16bpp, 15bpp and 8bpp while the others only support 15bpp and 8bpp).

    bt485 - (S3) Card has a BrookTree Bt485 or Bt9485 RAMDAC. This must be specified if the server fails to detect it.

    att20c505 - (S3) Card has an AT&T 20C505 RAMDAC. This must be specified either if the server fails to detect the 20C505, or if the card has a Bt485 RAMDAC and there are problems using clocks higher than 67.5Mhz.

    att20c498 - (S3) Card has an AT&T 20C498 or 21C498 RAMDAC. This must be specified if the server fails to detect it.

    att22c498 - (S3) Card has an AT&T 22C498 RAMDAC. This must be specified if the server fails to detect it.

    ibm_rgb514 - (S3) Card has an IBM RGB514 RAMDAC. This must be specified if the server fails to detect it.

    ibm_rgb524 - (S3) Card has an IBM RGB524 RAMDAC. This must be specified if the server fails to detect it.

    ibm_rgb525 - (S3) Card has an IBM RGB525 RAMDAC. This must be specified if the server fails to detect it.

    ibm_rgb526 - (S3) Card has an IBM RGB526 RAMDAC. This must be specified if the server fails to detect it.

    ibm_rgb528 - (S3) Card has an IBM RGB528 RAMDAC. This must be specified if the server fails to detect it.

    stg1700 - (S3) Card has an STG1700 RAMDAC. This must be specified if the server fails to detect it.

    stg1703 - (S3,W32) Card has an STG1703 RAMDAC. This must be specified if the server fails to detect it. Using the W32 server you MUST explicitly set the STG1703 as ClockChip to be able to use the programming capabilities.

    s3gendac - (S3) Card has an S3 86C708 GENDAC. This RAMDAC does not support 8 bit per RGB mode (don't specify the dac_8_bit option). It allows 16bpp operation with 801/805 boards. There is currently no auto-detection for this RAMDAC.

    s3_sdac - (S3) Card has an S3 86C716 SDAC RAMDAC. This must be specified if the server fails to detect it.

    ics5300 - (S3) Card has an ICS5300 RAMDAC. This must be specified if the server fails to detect it (the server will recognise this as an S3 GENDAC which is OK).

    ics5341 - (W32) Card has an ICS5341 RAMDAC. This must be specified if the server fails to detect it. For pixel clocks higher than 86MHz the server uses pixel multiplexing which seems to fail in a small band around 90MHz on most boards. While the ICS5341 RAMDAC is usually recognized as RAMDAC you MUST set it as ClockChip to be able to use the programming capabilities.

    ics5342 - (S3) Card has an ICS5342 RAMDAC. This must be specified if the server fails to detect it (the server will recognise this as an S3 SDAC which is OK).

    ti3020 - (S3) Card has a TI ViewPoint Ti3020 RAMDAC. This must be specified if the server fails to detect the Ti3020. Note that pixel multiplexing will be used for this RAMDAC if any mode requires a dot clock higher than 70MHz.

    ti3025 - (S3) Card has a TI ViewPoint Ti3025 RAMDAC. This must be specified if the server fails to detect the Ti3025.

    ti3026 - (S3) Card has a TI ViewPoint Ti3026 RAMDAC. This must be specified if the server fails to detect the Ti3026.

    ti3030 - (S3) Card has a TI ViewPoint Ti3030 RAMDAC. This must be specified if the server fails to detect the Ti3030.

    bt481 - (AGX, Mach32) Card has a BrookTree Bt481 RAMDAC.

    bt482 - (AGX) Card has a BrookTree Bt482 RAMDAC.

    herc_dual_dac - (AGX) Card (Hercules Graphite Pro) has both the 84-pin (Bt485 or AT&T20C505) and 44-pin (Bt481 or Bt482) RAMDACs installed.

    herc_small_dac - (AGX) Card (Hercules Graphite Pro) has only the 44-pin (Bt481 or Bt482) RAMDAC installed.

    ati68875 - (Mach64, Mach32) Card has an ATI 68875 RAMDAC. This must be specified if the server fails to detect it.

    tlc34075 - (Mach64, Mach32) Card has a TI 34075 RAMDAC. This must be specified if the server fails to detect it.

    ati68860 - (Mach64) Card has an ATI 68860 RAMDAC. This must be specified if the server fails to detect it.

    ati68880 - (Mach64) Card has an ATI 68860 RAMDAC. This must be specified if the server fails to detect it.

    stg1702 - (Mach64) Card has an STG1702 RAMDAC. This must be specified if the server fails to detect it.

    ch8398 - (Mach64) Card has an Chrontel 8398 RAMDAC. This must be specified if the server fails to detect it.

    att20c408 - (Mach64) Card has an AT&T 20C408 RAMDAC. This must be specified if the server fails to detect it.

IOBase ioaddress
    specified the base address for extended IO registers. This is only used by the AGX server, and by the P9000 server for the Viper PCI. For details of how to use it, refer to README.agx and README.P9000.

MemBase memaddress
    specifies the hard-wired part of the linear framebuffer base address. This option is only used by the P9000, S3, Mach64, Mach32, and TGA servers (and only when using a linear framebuffer). For the S3 server, the hard-wired part is the high 10 bits of the 32-bit address (ie memaddress is masked with 0xFFC00000). Note: this should not be required for the 864 and later chips where the entire framebuffer address is software-selectable, or for PCI cards. Also, note that the in versions prior to 3.1.1, the S3 server used only the top 6 bits of memaddress, and ored it with 0x3C00000. To get the same behaviour, or 0x3C00000 with the value given previously. For the Mach32 server, the mask is 0xF8000000 (except for PCI cards, where the membase setting is ignored).

    This option must be specified with the P9000 server. With local bus Diamond Vipers the value of memaddress can be either 0x80000000, 0x20000000, or 0xA0000000. The default is 0x80000000. Any value should work as long as it does not conflict with another device already at that address. For the Viper PCI, refer to README.P9000. For the Orchid P9000, the base address may be 0xC0000000, 0xD0000000 or 0xE0000000, and must correspond the the board's jumper setting.

    Note: The S3 server will normally probe for this address automatically. Setting this option overrides that probe. This is not normally recommended because the failure of the server's probe usually indicates problems in using the linear framebuffer.

    Note: The Mach64 server requires the memory aperture. For ISA bus video cards, this means that the aperture must be enabled and the aperture address must be set to a value less than 16Mb (which means that, on ISA systems only, to use the Mach64 server you must have 12Mb of main memory or less). Normally the Mach64 server will use pre-defined values for this address, but setting this option will override the pre-defined address.

    The Mach32 server should not require the use of this option under normal circumstances.

COPBase baseaddress
    This sets the coprocessor base address for the AGX server. Refer to README.agx for details.

Instance instance
    This sets the XGA instance number for the AGX server. Refer to README.agx for details.

S3MClk memclk
    This allows the video card's memory clock value to be specified. This is only used for 805i, 864 and Trio32/64 cards, and the value should not normally be given here for cards with an S3 Gendac or Trio64). This entry doesn't change the card's memory clock, but it is used to calculate the DRAM timing parameters. For further details refer to README.S3.

S3MNAdjust M N
    This allows some memory timing parameters to be adjusted for DRAM cards. This entry is not normally required.

S3RefClk refclk
    This allows the PLL reference clock to be specified. This may be required for some cards that use the IBM RGB5xx RAMDACs. The value is in MHz. For further details refer to README.S3.

Option flags may be specified in either the Device section or the Display subsection of the XF86Config file.

Option "optionstring"
    allows the user to select certain options provided by the drivers. Currently the following strings are recognized:

    nomemaccess - (S3) disable direct access to video memory. This option is ignored for the 864 and 964 chips.

    noaccel - (AGX, P9000) disable hardware acceleration for the P9000, and disables the font cache with the AGX.

    vram_128 - (AGX, P9000) when memory probe fails, use if you have 128Kx8 VRAMs.

    vram_256 - (AGX, P9000) when memory probe fails, use if you don't have 128Kx8 VRAMs.

    nolinear - (S3 and Mach32) disable use of a linear-mapped framebuffer.

    ti3020_curs - (S3) Enables the Ti3020's internal HW cursor. (Default)

    no_ti3020_curs - (S3) Disables the Ti3020's internal HW cursor.

    sw_cursor - (S3, Mach32, Mach64, P9000, AGX) Disable the hardware cursor.

    dac_8_bit - (S3, Mach32, Mach64, AGX) Enables 8-bit per RGB. Currently only supported with the Ti3020/5/6, Bt485, AT&T 20C505, AT&T 20C490/1, Sierra SC15025/6, AT&T 20C498 and STG1700/3, IBM RGB5xx (S3 server), Bt481 and Bt482 (AGX server), ATI68875/TLC34075/Bt885 (Mach32 server), ATI68875, TLC34075, ATI68860, ATI68880, STG1702, and STG1703 (Mach64 server) RAMDACs. This is now set by default in the S3 server when one of the above RAMDACs other than the AT&T 20C490/1 is used. Is also the default for the AGX server, except for the default VGA "normal" RAMDAC.

    dac_6_bit - (S3, AGX) Force 6-bit per RGB in cases where 8-bit mode would automatically be enabled.

    sync_on_green - (S3, P9000) Enables generation of sync on the green signal on cards with Bt485, AT&T 20C505, Ti3020/5/6 or IBM RGB5xx RAMDACs. Note: Although these RAMDACs support sync on green, it won't work on many cards because of the way they are designed.

    power_saver - (S3, Mach64) This option enables the server to use the power saving features of VESA DPMS compatible monitors. The suspend level is currently only supported for the Mach64 and for the 732, 764, 864, 868, 964, 968 S3 chips. Refer to the XF86Config(4/5) manual page for details of how to set the timeouts for the different levels of operation. This option is experimental.

    intel_gx - (Mach32) Sets the hard-wired offset for the linear framebuffer correctly for the Intel GX Pro cards. This option is equivalent to setting the membase to 0x78000000.

    ast_mach32 - (Mach32) Sets special handling for the Mach32 cards sold soldered-in on some AST motherboards.

    spea_mercury - (S3) Enables pixel multiplex support for SPEA Mercury cards (928 + Bt485 RAMDAC). For these cards, pixel multiplexing is required in order to use dot clocks higher than 67.5 MHz and to access more than 1MB of video memory. Pixel multiplexing is currently supported only for non-interlaced modes, and modes with a physical width no smaller than 1024.

    stb_pegasus - (S3) Enables pixel multiplex support for STB Pegasus cards (928 + Bt485 RAMDAC). For these cards, pixel multiplexing is required in order to use dot clocks higher than 67.5 MHz. Pixel multiplexing is currently supported only for non-interlaced modes, and modes with a physical width no smaller than 1024.

    number_nine - (S3) Enables pixel multiplex support for Number Nine GXe level 10, 11, 12 cards (928 + Bt485 RAMDAC). For these cards, pixel multiplexing is required in order to use dot clocks higher than 85 MHz. Pixel multiplexing is currently supported only for non-interlaced modes, and modes with a physical width no smaller than 800. This option is also required for some other Number Nine cards (eg, GXE64 and GXE64pro).

    diamond - (S3) This option may be required for some Diamond cards (in particular, the 964/968 VRAM cards).

    elsa_w1000pro - (S3) Enables support for the ELSA Winner 1000 PRO. This option is not usually required because the board can be auto-detected.

    elsa_w1000isa - (S3) Enables support for the ELSA Winner 1000 ISA. This option is not usually required because the board can be auto-detected.

    elsa_w2000pro - (S3) Enables support for the ELSA Winner 2000 PRO. This option is not usually required because the board can be auto-detected.

    pci_hack - (S3) Enables a workaround for problems seen with some PCI 928 cards on machines with a buggy SMC UART.

    s3_964_bt485_vclk - (S3) Enables a workaround for possible problems on cards using the 964 and Bt485.

    genoa, stb, hercules or number_nine, - (S3) These options may used to select different defaults for the blank delay settings for untested cards with IBM RGB5xx RAMDACs to avoid pixel wrapping problems.

    slow_vram - (S3) Adjusts the VRAM timings for cards using slow VRAM. This is required for some Diamond Stealth 64 VRAM and Hercules Terminator 64 cards.

    fast_vram - (S3) Adjusts the VRAM timings for faster VRAM access. There will be display errors and pixel garbage if your card can't support it.

    slow_dram - (W32) Adjusts the DRAM refresh for cards with slow DRAM. Try this if your monitor goes into power save mode with the W32 server and older W32 cards.

    slow_dram_refresh - (S3) Adjusts the DRAM refresh for cards with slow DRAM to avoid lines of corrupted pixels when switching modes.

    pci_burst_on - (W32) Turns on the PCI burst for the W32p chipset. Use this if your picture looks distorted and your mouse leaves trails behind with burst disabled.

    pci_burst_off - (W32) Turns off the PCI burst for the W32p chipset. Use this if your picture looks distorted and your mouse leaves trails behind with burst enabled.

    w32_interleave_on - (W32) Turns on the memory interleave for the W32i and W32p chipset. Try this if your server runs stable with it.

    w32_interleave_off - (W32) Turns off the memory interleave for the W32i and W32p chipset. Try this if your picture looks distorted or you don't get a picture at all.

    no_block_write - (Mach64) Disables the block write mode on certain types of VRAM-based Mach64 and on Rage Pro-based cards. If noise or shadows appear on the screen, this option should remove them.

    block_write - (Mach64) Enables the block write mode on certain types of VRAM-based Mach64 and on Rage Pro-based cards. Normally the Mach64 server will automatically determine if the card can handle block write mode, but this option will override the probe result.

    no_bios_clocks - (Mach64) The Mach64 server normally reads the clocks from the BIOS. This option overrides the BIOS clocks and forces the server to use the clocks given in the XF86Config file.

    no_program_clocks - (Mach64) The Mach64 server will automatically detect the clock chip and programs it directly from the video modes given. This option disables the clock chip programming and forces the use of the pre-programmed clocks either read from the BIOS or given on the Clocks line in the XF86Config file.

    clkdiv2 - for all accelerated chipsets using a set of discrete clocks (i.e. not using a programmable ClockChip or a ClockProg, like older S3 cards and most ET4000W32 cards). With this option enabled, the accelerated driver can also use all the clocks mentionned in the clocks line divided by 2, presenting the server with twice as many clocks to choose from, especially in the low- and mid-range. This is useful for creating very low resolution modes like 320x200, because the lowest available clock on many cards (25.175 MHz) is too high to create a standard 320x200 mode. A few SVGA chips don't support this option, causing a distorted screen (S3-805 rev C and P are known to have this problem).

    There are also numerous tuning options for the AGX server. Refer to README.agx for details.

Note that XFree86 has some internal capabilities to determine what hardware it is running on. Thus normally the keywords chipset, clocks, and videoram don't have to be specified. But there may be occasions when this autodetection mechanism fails, (for example, too high of load on the machine when you start the server). For cases like this, one should first run the server on an unloaded machine, look at the results of the autodetection (that are printed out during server startup) and then explicitly specify these parameters in the configuration file. It is recommended that all parameters, especially Clock values, be specified in the XF86Config file.

FILES

<XRoot>/bin/XF86_S3
    The 8, 16, and 32-bit color X server for S3

<XRoot>/bin/XF86_S3V
    The 8, and 16-bit color X server for S3 ViRGE

<XRoot>/bin/XF86_Mach8
    The 8-bit color X server for Mach8

<XRoot>/bin/XF86_Mach32
    The 8, and 16-bit color X server for Mach32

<XRoot>/bin/XF86_Mach64
    The 8, 16, and 32-bit color X server for Mach64

<XRoot>/bin/XF86_P9000
    The 8, 16, and 32-bit color X server for the P9000

<XRoot>/bin/XF86_AGX
    The 8, and 16-bit color X server for AGX and XGA

<XRoot>/bin/XF86_W32
    The 8-bit color X server for ET4000/W32 and ET6000

<XRoot>/bin/XF86_I128
    The 8, 16 and 32-bit color X server for Imagine 128

<XRoot>/bin/XF86_TGA
    The 8-bit color X server for DEC TGA

<XRoot>/bin/XF86_8514
    The 8-bit color X server for IBM 8514 and true compatibles

/etc/XF86Config
    Server configuration file

<XRoot>/lib/X11/XF86Config
    Server configuration file (secondary location)

<XRoot>/lib/X11/doc/README.agx
    Extra documentation for the AGX server

<XRoot>/lib/X11/doc/README.P9000
    Extra documentation for the P9000 server

<XRoot>/lib/X11/doc/README.S3
    Extra documentation for the S3 server

<XRoot>/lib/X11/doc/README.W32
    Extra documentation for the W32 server

Note: <XRoot> refers to the root of the X11 install tree.

SEE ALSO
X(1), Xserver(1), XFree86(1), XF86Config(4/5), xvidtune(1), xdm(1), xf86config(1), xinit(1)

AUTHORS

In addition to the authors of XFree86 the following people contributed major work to this server:

Kevin Martin,       martin@cs.unc.edu
Jon Tombs,          tombs@XFree86.org
Rik Faith,          faith@cs.unc.edu
    Did the overall work on the base accelerated servers.

David Dawes,        dawes@XFree86.org
Dirk Hohndel,       hohndel@XFree86.org
David Wexelblat,    dwex@XFree86.org
    Merged their work into XFree86.

Jon Tombs,          tombs@XFree86.org
David Wexelblat,    dwex@XFree86.org
David Dawes,        dawes@XFree86.org
Amancio Hasty,      hasty@netcom.com
Robin Cutshaw,      robin@XFree86.org
Norbert Distler,    Norbert.Distler@physik.tu-muenchen.de
Leonard N. Zubkoff, lnz@dandelion.com
Harald Koenig,      koenig@tat.physik.uni-tuebingen.de
Bernhard Bender,    br@elsa.mhs.compuserve.com
Hans Nasten,        nasten@everyware.se
Dirk Hohndel,       hohndel@XFree86.org
Joe Moss,           joe@morton.rain.com
    Development and improvement of the S3 specific code.

Kevin Martin,       martin@cs.unc.edu
Rik Faith,          faith@cs.unc.edu
Tiago Gons,         tiago@comosjn.hobby.nl
Hans Nasten,        nasten@everyware.se
Scott Laird,        scott@laird.com
    Development and improvement of the Mach8 and 8514/A specific code.

Kevin Martin,       martin@cs.unc.edu
Rik Faith,          faith@cs.unc.edu
Mike Bernson,       mike@mbsun.mlb.org
Mark Weaver,        Mark_Weaver@brown.edu
Craig Groeschel,    craig@metrolink.com
Bryan Feir,         jenora@istar.ca
    Development and improvement of the Mach32 specific code.

Kevin Martin,       martin@cs.unc.edu
    Development of the Mach64 specific code.

Erik Nygren,        nygren@mit.edu
Harry Langenbacher, harry@brain.jpl.nasa.gov
Chris Mason,        clmtch@osfmail.isc.rit.edu
Henrik Harmsen,     harmsen@eritel.se
    Development and improvement of the P9000 specific code.

Henry Worth,        henry.worth@amail.amdahl.com
    Development of the AGX specific code.

Glenn Lai,          glenn@cs.utexas.edu
Dirk Hohndel,       hohndel@XFree86.org
Koen Gadeyne,       koen.gadeyne@barco.com
    Development of the ET4000/W32 and ET6000 specific code.

See also the XFree86(1) manual page.

BUGS

Some S3 cards with Bt485 RAMDACs are currently restricted to dot-clocks less than 85MHz.

The P9000 server may still have problems with cards other than the Diamond Viper VLB. There may still be problems with VGA mode restoration, but these should almost never occur. Using physical resolutions different from the virtual resolution is not supported and is not possible with the P9000. Use at dot-clocks greater than 110 MHz is not recommended and not supported. Diamond claims that 135 MHz is the maximum clock speed, but some of their bt485's are not rated that high. If you do not have a 135 MHz bt485 on your Viper, contact Diamond tech support and they will send you an RMA number to replace the board. Acceleration is being added in slowly. At the present, only CopyArea and MoveWindow and DrawLine are implemented. Other accelerated features are being tested and may be available in the next release. There seems to be a problem with olvwm when used with xdm and VT switching. The cursor will be messed up when you return to a VT if the cursor changed while you were in the VT.

The ET6000 server is quite new, and therefor not very thoroughly tested. Accelerated support is present, but doesn't use the full potential of the ET6000 chip (yet).

CONTACT INFO
XFree86 source is available from the FTP server ftp.XFree86.Org and mirrors. Send email to XFree86@XFree86.Org for details.