Subject: A doubt in Isoch Transmission!

From: Venkatesh V <[email-masked]>
Date: Fri, 5 Mar 1999 09:22:57 +0530

Hi IP1394'ers
I have the following doubts.

1. Say in a node A, we have programmed a transmit and receive context for channel number 10.

If a node A transmits the a packet on the
channel number 10, will node A be able to simultaneously receive data
transmitted on the channel number 10?
Putting it in a different way, If a node A sends a broadcast packet to all other nodes on the
bus, will node A also receive it on its receive context?

2. In isochronous data transfer, we assume the following situation :
cycleMatchEnable bit is set for a context A.
A 15 bit value say XXXX is written into cycleMatch field of the context match register so that
when the cycleStart.cycleCount value equals the lower order 13 bits of XXXX, the DMA context
will be enabled for receives.

My first doubt lies in the fact that will the Host controller perform the 15 bit comparison OR
13 bit comparison ? ie. whether the 13 bits of XXXX will be compared with
cycleTimer.cyclecount OR XXXX is compared with 13 bit cycleTimer.cycleCount and 2 lower bits
of cyclesecond field???

Nextly, when does the next occurence of the cycle number XXXX happen???

I have two ideas floating in my mind:
1. (13 bit comparison)
the value in CycleTimer.CycleCount rolls over after 8000 cycles. so the next time the cycle
number XXXX can come is only after 4 secs. (ie. 8000 * 125 microsec)

IS MY CALCULATION CORRECT????

2. (15 bit comparison)
the next time the cycle number XXXX can come is after 8 secs (ie. 8000 * 125 microsec * 2)
NOTE : This multiplication by 2 is for lower order 2 bits in cycleSeconds field....

3. Suppose an application wants to recv / xmit a packet every 5th cycle,
could u throw some light on how this could be done??

Hope i am not confusing...

Eagerly awaiting a reply,

regards,
Venkatesh