Subject: Re: Adoption Call for <draft-troan-6man-universal-ra-option>

From: Nick Hilliard <[email-masked]>
Date: Thu, 2 Sep 2021 22:04:00 +0100

[email-masked] wrote on 31/08/2021 17:47:
> RA parsers in ASICs might not be the main target for this work.
> Do you have any real examples or are there implementors of RA parsers in ASICs on the list?

the candidates worth investigating would be large scale aggregation 
devices which deal with lots of edge devices connecting, e.g. RAN / dsl 
/ docsis / gpon termination units, b-ras devices, etc.

Nick

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From: Ole Troan <[email-masked]>
Date: Thu, 2 Sep 2021 23:48:05 +0200

> On 2 Sep 2021, at 23:04, Nick Hilliard <[email-masked]> wrote:
> 
> the candidates worth investigating would be large scale aggregation devices which deal with lots of edge devices connecting, e.g. RAN / dsl / docsis / gpon termination units, b-ras devices, etc.

When would a BRAS or a CMTS need to parse RAs? 

Cheers,
Ole

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From: Vasilenko Eduard <[email-masked]>
Date: Fri, 3 Sep 2021 08:02:03 +0000

Of course, BNG should not "parse RAs" because it should generate it:-)
And for sure it should be inside the PFE (data plane) for scalability reasons.
But the text (CBOR?) is constant on a particular interface (I hope) - then it could be prepared during the initial interface initialization ("stack construction") that is done in the control plane anyway.
Ed/
-----Original Message-----
From: ipv6 [mailto:[email-masked]] On Behalf Of Ole Troan
Sent: Friday, September 3, 2021 12:48 AM
To: Nick Hilliard <[email-masked]>
Cc: Michael Richardson <[email-masked]>; 6man WG <[email-masked]>
Subject: Re: Adoption Call for <draft-troan-6man-universal-ra-option>

Cheers,
Ole
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From: Alexandre Petrescu <[email-masked]>
Date: Fri, 3 Sep 2021 11:38:16 +0200

Le 31/08/2021 à 18:47, [email-masked] a écrit :
>>> Other threads suggested that people think that it's on the wire, and that
>>> ASICs would need to parse JSON, which is simply not true.
>>
>> this doesn't change the fact that physical hardware will need to be spun to parse this data.  And CBOR is still significantly more complex than a tlv.
> 

I thought ASICs no longer exist and talk now about FPGA.

But maybe we mean something like a chip that does not have a linux on it 
to which to login root and sh.  One might not be able to CLI commands on 
it (Command Line Interface), but might 'flash' it with a firmware 
excuting micro-code.

In these kinds of non-CLI chips there are still some IP stacks running, 
including RS and RA.  They have lots of RAM and still it is possible to 
add more complex textual parsers, like for a JSON-like language. 
However, with care.

And yes, there are also some very limited chips that dont have much 
memory.  They might have 16kbyte of RAM.  These do execute software 
programatically, but they cant hold IP stacks on them, be it IPv4 or 
IPv6.  They do communicate, but via RS-232 lines with a language called 
'AT commands'.  For these, the TCP part of an IP stack is too big, the 
NUD part of IPv6 is also too complex; but the textual parser like 
reading (ATDT 062141) is still very feasible, albeit with a very limited 
vocabulary.

Alex