Subject: [Lwip] ARM Announces ARM Cortex-M0+ Core to Power the Internet of Things (was Re: Device Classification)

From: Guillaume Fortaine <[email-masked]>
Date: Tue, 13 Mar 2012 17:03:15 +0100

Hello,

For your information :

http://www.cnx-software.com/2012/03/13/arm-announces-arm-cortex-m0-mcu-to-power-the-internet-of-things/

Best Regards,

Guillaume FORTAINE

On Tue, Jan 24, 2012 at 5:25 PM, Hannes Tschofenig
<[email-masked]> wrote:
> Hey guys,
>
> after sending the workshop announcements to a few working groups I was asked
> what I mean by "constrained" device.
>
> I responded with a pointer to the classification Carsten proposed
> in http://tools.ietf.org/html/draft-bormann-lwig-guidance-00:
>
>        +---------+-----------------------+-------------------------+
>        | Name    | data size (e.g., RAM) | code size (e.g., Flash) |
>        +---------+-----------------------+-------------------------+
>        | Class 1 | ~ 10 KiB              | ~ 100 KiB               |
>        |         |                       |                         |
>        | Class 2 | ~ 50 KiB              | ~ 250 KiB               |
>        +---------+-----------------------+-------------------------+
>
> During the IAB technical plenary at the last IETF meeting Jari claimed that
> we need to have a Class 0 here as well to cover his sensor deployment.
>
> Any thoughts about this classification?
>
> Ciao
> Hannes
>
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