Subject: RE: [rohc] Explanation on F,H and P bits

From: [email-masked]
Date: Thu, 30 May 2002 09:19:28 -0500

Ok..i have one more question concering P bits..
say, we have UDVM bytecode containing UDVM instruction INUT_BITS.

First time, INPUT_BITS requests 4 bits (i'm not concerned about F or H bits).
Second time, INPUT_BITS requets 8 bits ...
  the question here how are the bits be given from the input buffer(input buffer is something that contains input data)? 

Addr:  X         X+1      X+2
  ----------------------------------
  | 11010011 | 00001111 | 10010011 |
  ----------------------------------
   ^
   |
   |
current Pointer
 
   For simplicity, let's assume that current pointer points to address X and P = 0 (MSB to LSB order) and F =0. 
   
  	INPUT_BITS, when first encountered, receives: 1101

Here are the possibilities, when INPUT BITS is encountered second time. Which case should be behaved by the INPUT_BITS?

Case 1)
      INPUT_BITS, when encountered second time, receives: 00110000 ( bits spanning two bytes)??
Case 2)
      INPUT_BITS, when encountered second time, receives: 00001111 (byte value at address X+1, ignore the first byte)

Case 3)
   UNDEFINED: Let the user be advised that requesting bits spanning over multiple bytes needs to be avoided.

-Narendra

-----Original Message-----
From: ext West, Mark (ITN) [mailto:[email-masked]]
Sent: 30 May, 2002 07:38 AM
To: Chaparala Narendra (EXT-NRC/Dallas)
Cc: [email-masked]
Subject: Re: [rohc] Explanation on F,H and P bits

Hi Narenda,

My understanding (and I'm willing to be corrected by a sigcomp author, 
if one wishes to stick his head above the parapet...) is as follows.

(Cribbing heavily from -06 in the process)

"The P-bit controls the order in which bits are passed from the
    dispatcher to the INPUT instructions. If set to 0, it indicates that
    the bits within an individual byte are passed to the INPUT
    instructions in MSB to LSB order. If it is set to 1, the bits are
    passed in LSB to MSB order."

So, given 11000011, then the P bit means that reading a sequence of 3 
bits will give:

P = 0, gives the sequence 1, 1, 0 (reading the byte 'left to right')
P = 1, gives the sequence 1, 1, 0 (reading the byte 'right to left')

So, in this case, the string of bits produced is the same, because your 
input byte is palindromic.

Then:

"If the F-bit is set to 0, the INPUT-BITS instruction interprets the
    received bits as arriving MSBs first, and if it is set to 1 it
    interprets the bits as arriving LSBs first. "

Given the above example, where the string of bits is 1, 1, 0 in any 
case, then the F-bit will mean:
F = 0, the bits are seen as running MSB -> LSB giving 110
F = 1, the bits are seen as running LSB -> MSB giving 011

Does that help?

Cheers,

Mark.

[email-masked] wrote:

 > Can anyone explain how these bits are used for Input instructions?  Say,
 >  if the INPUT_BITS instruction is encountered and the current bits
 > in the dispatcher are 11000011 and the instruction requested 3 bits.
 >
 > Case P=0,  resultant Integer = 6 (bits 110). How does F bit affect
 > the way this integer is stored at the destination address? My
 > understanding is that , case F=0, the integer stored at destination
 >  address = (6)110 case F=1, the integer stored at destination
 > address = (3) 011
 >
 > Case P=1, resultant integer = 3(011) Case F=0, the integer stored at
 >  destination address = 3 (011) Case F=1, the integer stored at
 > destination address = 6 (110).
 >
 > Please correct me if my interpretation is wrong?
 >
 > thanks, Narendra
 >
 > _______________________________________________ Rohc mailing list 
[email-masked]

 > https://www1.ietf.org/mailman/listinfo/rohc
 >

-- 
Mark A. West, Consultant Engineer
Roke Manor Research Ltd., Romsey, Hants.  SO51 0ZN
Phone +44 (0)1794 833311   Fax  +44 (0)1794 833433

(Yes, I do know that my disclaimer is in an attachment.  And, no, I
didn't ask for it to be that way)

_______________________________________________
Rohc mailing list
[email-masked]
https://www1.ietf.org/mailman/listinfo/rohc

---

From: "West, Mark (ITN)" <[email-masked]>
Date: Thu, 30 May 2002 15:51:29 +0100

Hi Narenda,

I think -06 is pretty explicit on this one:

"The following diagram illustrates the order in which bits are passed
    to the INPUT instructions for both cases:

     MSB         LSB MSB         LSB     MSB         LSB MSB         LSB

    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
    |0 1 2 3 4 5 6 7|8 9 ...        |   |7 6 5 4 3 2 1 0|        ... 9 8|
    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+   +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

         Byte 0           Byte 1              Byte 0          Byte 1

                  P = 0                               P = 1"

Compressed data can't afford the luxury of being byte-aligned (it rather 
defeats the point of the exercise ;-) so the bits span multiple bytes.

 From your example, having read bits 0, 1, 2, 3 on the first INPUT-BITS, 
the next will read bits 4, 5, 6, 7, 8, 9, ...

So, that's your 'case 1'.

ok?

Mark.

[email-masked] wrote:

 > Ok..i have one more question concering P bits.. say, we have UDVM
 > bytecode containing UDVM instruction INUT_BITS.
 >
 > First time, INPUT_BITS requests 4 bits (i'm not concerned about F or
 >  H bits). Second time, INPUT_BITS requets 8 bits ... the question
 > here how are the bits be given from the input buffer(input buffer
 > is something that contains input data)?
 >
 > Addr:  X         X+1      X+2 ---------------------------------- |
 > 11010011 | 00001111 | 10010011 | ---------------------------------- ^
 >

 > | | current Pointer
 > Here are the possibilities, when INPUT BITS is encountered second
 > time. Which case should be behaved by the INPUT_BITS?
 >
 > Case 1) INPUT_BITS, when encountered second time, receives: 00110000
 >  ( bits spanning two bytes)?? Case 2) INPUT_BITS, when encountered
 > second time, receives: 00001111 (byte value at address X+1, ignore
 > the first byte)
 >
 > Case 3) UNDEFINED: Let the user be advised that requesting bits
 > spanning over multiple bytes needs to be avoided.
 >
 > -Narendra
 >
 >
 > -----Original Message----- From: ext West, Mark (ITN)
 > [mailto:[email-masked]] Sent: 30 May, 2002 07:38 AM To:
 > Chaparala Narendra (EXT-NRC/Dallas) Cc: [email-masked] Subject: Re:
 > [rohc] Explanation on F,H and P bits
 >
 >
 >
 > Hi Narenda,
 >
 > My understanding (and I'm willing to be corrected by a sigcomp
 > author,  if one wishes to stick his head above the parapet...) is
 > as follows.
 >
dispatcher
 >  to the INPUT instructions. If set to 0, it indicates that the bits
 >  within an individual byte are passed to the INPUT instructions in
 > MSB to LSB order. If it is set to 1, the bits are passed in LSB to
 > MSB order."
 >
 > So, given 11000011, then the P bit means that reading a sequence of
 > 3  bits will give:
 >
 > P = 0, gives the sequence 1, 1, 0 (reading the byte 'left to right') P
 >  = 1, gives the sequence 1, 1, 0 (reading the byte 'right to left')
 >
 > So, in this case, the string of bits produced is the same, because
 > your  input byte is palindromic.
 >
 > Then:
 >
received
 >  bits as arriving MSBs first, and if it is set to 1 it interprets
 > the bits as arriving LSBs first. "
 >
case,
 >  then the F-bit will mean: F = 0, the bits are seen as running MSB
 > -> LSB giving 110 F = 1, the bits are seen as running LSB -> MSB
 > giving 011
 >
 > Does that help?
 >
 > Cheers,
 >
 > Mark.
 >
 >
 >
 >> Can anyone explain how these bits are used for Input instructions?
 >>   Say, if the INPUT_BITS instruction is encountered and the
 >> current bits in the dispatcher are 11000011 and the instruction
 >> requested 3 bits.
 >>
 >> Case P=0,  resultant Integer = 6 (bits 110). How does F bit affect the
 >>  way this integer is stored at the destination address? My understanding
 >>  is that , case F=0, the integer stored at destination address =
 >> (6)110 case F=1, the integer stored at destination address = (3)
 >> 011
 >>
 >> Case P=1, resultant integer = 3(011) Case F=0, the integer stored
 >> at destination address = 3 (011) Case F=1, the integer stored at 
destination
 >>  address = 6 (110).