Subject: Re: [RRG] FIB cache?

From: "Tom Petch" <[email-masked]>
Date: Wed, 21 Mar 2007 14:28:32 +0100

You might want to look at RFC3222 for a set of definitions but bear in mind that
the term 'router' covers a wide spectrum of devices, from general purpose
processor with two Ethernet cards to highly specialised boxes with ASICS, fast
paths and caches all over the place.

Tom Petch

----- Original Message -----
From: "András Császár (IJ/ETH)" <[email-masked]>
To: "rrg" <[email-masked]>
Sent: Tuesday, March 20, 2007 2:46 PM
Subject: [RRG] FIB cache?

> Hi!
> On the Saturday seminar there was a discussion that only a few prefixes are
responsible for majority of the traffic, while a lot of prefixes generate no or
very minimal traffic. Someone had a comment that this speaks for having a FIB
cache.
>
> I thought there is already a cache in the hardware. Could we clarify how the
routes (forwarding entries) are (or are not) cached? What tables/structures are
stored in generic memory, what is stored in the linecard in a fast memory?
>
> I think to know what is the difference between RIB and FIB. I am, however, at
this moment not that sure when someone says "forwarding table", it equals to FIB
or not. And is the "forwarding table" already maintained in the hardware on the
line card (e.g. in a CAM), or it is still a software based representation.
>
> Can someone bring some light into this? Because I think the caching comment is
quite valid.
>
> BR,
> András
> rzuzrrzzw&ƫrzm (b ??~  r +-

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