Subject: [PWE3] comment on "draft-frost-pwe3-timing-pw-reqs-00.txt"

From: [email-masked]
Date: Mon, 25 Jul 2005 11:26:30 +0200

Dear sirs,

I would like to address a comment on the following document:
draft-frost-pwe3-timing-pw-reqs-00.txt

In section 3 related to applications, the paragraph related to CE
Synchronised Networks requires some clarification.

It is explained that PE2 is loop timed to the AC input signal coming from
CE2. As CE2 recovers its clock from the signal passing through PE2, this
scenario seems to generate a timing loop situation between PE2 and CE2.
I suggest that the text of this application scenario is modified to explain
in more details how it works.

Best regards

Jean-Loup Ferrant

NB: Sorry the previous mail had no title.

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From: [email-masked]
Date: Mon, 25 Jul 2005 14:30:57 +0100

Hi Jean Loup,

Thanks for the comment. Looking at it again, I think I can see how it 
might imply a timing loop, although this is not intended. I'll try and 
re-word it next time. I hope the revised figure 2 gives the idea better.

Regards,
Tim
                    |<-------- Pseudo-wires -------->| 
                    |                                | 
                    |      |<-- PSN Tunnel -->|      | 
                    V      V                  V      V 
   +-----+    AC    +------+                  +------+     AC   +-----+
   | CE1 |    |     |  PE1 |==================| PE2  |     |    | CE2 | 
   |     |<---------|< ............PW1............. -|<---------|<-   | 
   |     |    |     | |    |                  |    | |     |    |  |  | 
   |   ->|--------->|- ............PW2............. >|--------->|  |  | 
   |  |  |    |     |      |                  |      |     |    |  |  | 
   +-----+          |      |                  |      |          +-----|
      ^             |      |                  |      |             ^ 
      |A            |      |                  |      |            G| 
      +------------>| .............PW3.............. |-------------- 
      |             |      |==================|      | 
     +-+            +------+                  +------+ 
     |L| 
     +-+ 

          Figure 2: Relationship to the CE Synchronized Scenario 

[email-masked] 
25/07/2005 10:26

To
[email-masked]
cc
[email-masked], [email-masked]
Subject
comment on "draft-frost-pwe3-timing-pw-reqs-00.txt"

Dear sirs,

I suggest that the text of this application scenario is modified to 
explain

Best regards

Jean-Loup Ferrant

---

From: [email-masked]
Date: Mon, 25 Jul 2005 15:39:08 +0200

Hi Tim,

May be you should simply write that the PW3 that transports the timing does
not make use of the clock delivered by CE2 to PE2 in the PE2 equipment.

Regards

Jean-Loup

                      Tim.Frost@Zarlin                                                                                                 
                      k.Com                    To:      Jean-Loup FERRANT/FR/ALCATEL@ALCATEL                                           
                                               cc:      [email-masked], [email-masked]                                   
                      25/07/2005 15:30         Subject: Re: comment on "draft-frost-pwe3-timing-pw-reqs-00.txt"                        

Hi Jean Loup,

Thanks for the comment. Looking at it again, I think I can see how it might
imply a timing loop, although this is not intended. I'll try and re-word it
next time. I hope the revised figure 2 gives the idea better.

Regards,
Tim

                                                                           
 Jean-Loup.Ferrant@alcatel                                                 
 .fr                                                                       
                                                                           
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 25/07/2005 10:26                     [email-masked]                        
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                                      "draft-frost-pwe3-timing-pw-reqs-00. 
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Dear sirs,

Best regards

Jean-Loup Ferrant