Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

From: [email-masked]
Date: Mon, 19 Aug 2002 10:05:48 -0500

Hi Kwang,
  It needs to jump backwards rather than forward ( -27 bytes backward). So, adding e5 (65509) to the current position with modulo 2^16 gives the actual position of next_character label. 

  i.e (65509 + 36 )%65536 = (65545)%65536 = 9 (the actual position of next_char)

-Narendra

-----Original Message-----
From: ext Chan Kwang Mien [mailto:[email-masked]]
Sent: 18 August, 2002 08:12 PM
To: Chaparala Narendra (EXT-NRC/Dallas)
Subject: Re: [rohc] LZSS, LZ77 and LZW byte Code

hi Narendra,

thanks for your bytecodes.

i have a question about the first jump in the byte codes for LZSS.
it is encoded as 16 e5. according to the mnemonic codes, the program
flow supposed to jump to next_character label.

next_character label is 27 bytes away from the jump instruction bytecode.
e5 will be decoded as 65509. how is that possible ?

can you enlighten me on this ? thanks.

regards,
Kwang Mien

p/s i did not cc this mail to the mailing list coz i wld like
to clarify with u lest my concept is still not quite right.

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From: [email-masked]
Date: Wed, 21 Aug 2002 11:31:36 -0500

Thanks Carsten for your suggestion. My intention here was to give a complete bytecode so that interested people can give test and give feedback whether the encoding resulted in minimum bytecode and also if the final byte code is correct. Please let me know your comments on the byte code.

-narendra 

-----Original Message-----
From: ext Carsten Bormann [mailto:[email-masked]]
Sent: 17 August, 2002 09:38 AM
To: Chaparala Narendra (EXT-NRC/Dallas)
Cc: [email-masked]
Subject: Re: [rohc] LZSS, LZ77 and LZW byte Code

Narendra,

this is interesting.
I haven't checked your binary code yet, but let me make one observation:
At the end of the assembly, you can normally squash trailing zero bytes (as well 
as leading ones, if there is a number that can be expressed in the sigcomp header).
This would make your code pieces much smaller, so they are more representative 
of what actually will be transmitted.

Gruesse, Carsten

---

From: "Lajos Zaccomer (ETH)" <[email-masked]>
Date: Mon, 26 Aug 2002 08:34:13 +0200

Hi Narenda,

Sorry to forget referring the LZ77. I checked the draft, and it appeared to say nothing about the handling of the reserved bits in the input_bit_order register. However, as the reserved field in the requested feedback data should be ignored by the receiving endpoint, this type of initialization should have been accepted. I will discuss it with the developer of our udvm.
We didn't notice this problem, because we adjusted the code to our assembler, and this also means that our encoding is not optimal, as the decompressed_pointer is stored somewhere else.

Regards,

Zacco

-----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Friday, August 23, 2002 6:09 PM
To: [email-masked]
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Zacco,
 I assume that you were refering to LZ77 bytecode. The first instruction is MULTILOAD (64, 3, circular_buffer, udvm_memory_size, circular_buffer) which is equivalent to "MULTILOAD   64,     #3,     512,    8192,   512". The actual bytecode is "f 86 3 89 8d 89".
  So, in terms of actual translation, the assembler did the right thing. May be mnemonic instruction is not right in initializing input_bit_order register. The assembler just converts the mnemonic code into bytecodes. 
  Does the value of last operand (512) is right in setting the input_bit_register value?

-narendra

-----Original Message-----
From: ext Lajos Zaccomer (ETH) [mailto:[email-masked]]
Sent: 23 August, 2002 10:31 AM
To: Chaparala Narendra (EXT-NRC/Dallas)
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Hi Narenda,

Is this the first line in your asm code:
	0080 MULTILOAD   64,     #3,     512,    8192,   512;
If yes, you initialize the input_bit_order register with an invalid value. At least our udvm didn't like it.

Regards,

Zacco

-----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Friday, August 16, 2002 11:52 PM
To: [email-masked]
Subject: [rohc] LZSS, LZ77 and LZW byte Code

Hi,
   I'm attaching the output of my assembler (supposed to generate minimum encoding byte code) for mnemonic code algorithms described in Sigcomp User Guide. At this point i'm attaching  the output of LZ77, LZW and LZW. Based upon your feedback, i will generate byte codes for DEFLATE, LZJH etc. Note that all values of the bytecode are in hexadecimal format. 
	Please test the byte code with your UDVMs and let me know the results. 

thanks,
Narendra <<UG_LZ77.txt>>  <<UG_LZSS.txt>>  <<UG_LZW.txt>>

---

From: "Price, Richard" <[email-masked]>
Date: Tue, 27 Aug 2002 11:36:56 +0100

Hi,

The only situation where using the reserved bits in the input_bit_order
register can cause a problem is if an INPUT-BITS or an INPUT-HUFFMAN
instruction is encountered. In this case it is necessary to call a
decompression failure because the UDVM doesn't know how to correctly
interpret the reserved bits. Section 8.2 of the SigComp draft defines
the following:

"Decompression failure occurs if an INPUT-BITS or an INPUT-HUFFMAN
instruction is encountered and the input_bit_order register does not
lie between 0 and 7 inclusive."

However, since the LZ77 bytecode doesn't contain any INPUT-BITS or
INPUT-HUFFMAN instructions, we can safely use the reserved bits to
store other data such as the decompressed_pointer.

Regards,

Richard

> From: Lajos Zaccomer (ETH) [mailto:[email-masked]]
> Sent: Monday, August 26, 2002 7:34 AM
> To: [email-masked]'
> Sorry to forget referring the LZ77. I checked the draft, and 
> it appeared to say nothing about the handling of the reserved 
> bits in the input_bit_order register. However, as the 
> reserved field in the requested feedback data should be 
> ignored by the receiving endpoint, this type of 
> initialization should have been accepted. I will discuss it 
> with the developer of our udvm.
> We didn't notice this problem, because we adjusted the code 
> to our assembler, and this also means that our encoding is 
> not optimal, as the decompressed_pointer is stored somewhere else.
> 
> Regards,
> 
> Zacco
> 
> 
> 
> From: [email-masked] 
> [mailto:[email-masked]]
>  I assume that you were refering to LZ77 bytecode. The first 
> instruction is MULTILOAD (64, 3, circular_buffer, 
> udvm_memory_size, circular_buffer) which is equivalent to 
> "MULTILOAD   64,     #3,     512,    8192,   512". The actual 
> bytecode is "f 86 3 89 8d 89".
>   So, in terms of actual translation, the assembler did the 
> right thing. May be mnemonic instruction is not right in 
> initializing input_bit_order register. The assembler just 
> converts the mnemonic code into bytecodes. 
> If yes, you initialize the input_bit_order register with an 
> invalid value. At least our udvm didn't like it.
> 
> Regards,
> 
> Zacco
> 
> From: [email-masked] 
> [mailto:[email-masked]]
>    I'm attaching the output of my assembler (supposed to 
> generate minimum encoding byte code) for mnemonic code 
> algorithms described in Sigcomp User Guide. At this point i'm 
> attaching  the output of LZ77, LZW and LZW. Based upon your 
> feedback, i will generate byte codes for DEFLATE, LZJH etc. 
> Note that all values of the bytecode are in hexadecimal format.

---

From: "Lajos Zaccomer (ETH)" <[email-masked]>
Date: Wed, 28 Aug 2002 12:18:41 +0200

Hi Narenda,

Yes, Richard has absolutely cleared the problem.
I have no more results at the moment, I plan to go on with your codes next week.

Regards,

Zacco

-----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Tuesday, August 27, 2002 5:52 PM
To: [email-masked]
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Hi Zacco,
   From the richard's mail, i infer that there's no problem with assembler bytecode. Did you had an opportunity running other byte codes?
-Narendra

-----Original Message-----
From: ext Lajos Zaccomer (ETH) [mailto:[email-masked]]
Sent: 26 August, 2002 01:34 AM
To: Chaparala Narendra (EXT-NRC/Dallas)
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Hi Narenda,

Regards,

Zacco

-----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Friday, August 23, 2002 6:09 PM
To: [email-masked]
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Zacco,

-narendra

-----Original Message-----
From: ext Lajos Zaccomer (ETH) [mailto:[email-masked]]
Sent: 23 August, 2002 10:31 AM
To: Chaparala Narendra (EXT-NRC/Dallas)
Subject: RE: [rohc] LZSS, LZ77 and LZW byte Code

Hi Narenda,

Regards,

Zacco

-----Original Message-----
From: [email-masked] [mailto:[email-masked]]
Sent: Friday, August 16, 2002 11:52 PM
To: [email-masked]
Subject: [rohc] LZSS, LZ77 and LZW byte Code

Hi,

thanks,