Subject: [bess] minor change to draft-ietf-bess-evpn-df-election-framework-05

From: "Ali Sajassi (sajassi)" <[email-masked]>
Date: Tue, 20 Nov 2018 23:25:20 +0000

Folks,

The authors of  the above draft are purposing a minor change to the draft and since the draft is currently under review by IESG, the chair has asked to send an email to the WG to solicit inputs and ensuring that there is no objection. The proposed change is as follow:

Currently, the above draft defines an eight-bit “DF Alg” field as shown in the following figure. The proposed change is to reduce the eight-bit field to a five-bit field.

*** OLD Text

              0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
             | Type=0x06     | Sub-Type(0x06)|   DF Alg      |    Bitmap     |
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
             |     Bitmap    |            Reserved                           |
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

   o DF Alg (1 octet) - Encodes the DF Election algorithm values
     (between 0 and 255) that the advertising PE desires to use for the
     ES. This document requests IANA to set up a registry called "DF Alg
     Registry" and solicits the following values:

     - Type 0: Default DF Election algorithm, or modulus-based algorithm
       as in [RFC7432<https://tools.ietf.org/html/rfc7432>].

     - Type 1: HRW algorithm (explained in this document).

     - Types 2-254: Unassigned.

     - Type 255: Reserved for Experimental Use.

***NEW Text

              0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
             | Type=0x06     | Sub-Type(0x06)| RSV |  DF Alg  |    Bitmap    |
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
             |     Bitmap    |            Reserved                           |
             +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+

   o DF Alg (5 bits) - Encodes the DF Election algorithm values
     (between 0 and 31) that the advertising PE desires to use for the
     ES. This document requests IANA to set up a registry called "DF Alg
     Registry" and solicits the following values:

     - Type 0: Default DF Election algorithm, or modulus-based algorithm
       as in [RFC7432<https://tools.ietf.org/html/rfc7432>].

     - Type 1: HRW algorithm (explained in this document).

     - Types 2-30: Unassigned.

     - Type 31: Reserved for Experimental Use.

The remaining 3-bits of that octet (bits 16, 17, and 18 in the above figure) will be used by per-mcast-flow-df-election and will be expanded and described there and will be discussed in the next IETF as usual at the BESS WG session.

Regards,
Ali & other co-authors