Subject: Interrupts in 1394!

From: Venkatesh V <[email-masked]>
Date: Tue, 19 Jan 1999 16:53:52 +0530

hi!
I have some doubts regarding Interrupts geenrated by 1394 hardware..
1.
There is a Phy interrupt which the OHCI draft says as
"bit 19 of Interrupt event register (Phy interrupt) :
The PHY requests an interrupt through a status transfer."

when is this interrupt geenrated and what should be done when this is generated?

2.
Also for bit 25 (CycletooLong) interrupt, what should be done????
actually when this interrupt occurs, LinkControl.cycleMaster is cleared and this interrupt
will be triggered only if LinkControl.cycleMaster is set.
so i feel probably to handle this interrupt i will have to just set the cycle master bit back
to 1....Is it sufficient...

3.
bit 26 (PhyRegRcvd) interrupt : is this interrupt generated only when i geenrate a PHY
register read request???? what are these PHY registers and where are they residing??? can a
software access these addresses???
I just know that we cannot access PHY regsiter 0 since it corresponds to NODEIDs register.

Eagerly awaiting ur clarification of all my above doubts...

Regards,
Venkatesh