Subject: [Sip] SIP in a FPGA with VHDL

From: Luis Alberto Cacho García<[email-masked]>
Date: Tue, 16 Oct 2007 08:34:59 -0500

Hi, i'm newbie in this topic (SIP), and I tried to implement over FPGA 
specify in a Xilinx Spartan 3E, but the fact is that i don't know the 
architecture of SIP, I study the RFC3261 but I don't understand very 
well. I request your help to understand the protocol and implement in a 
FPGA with VHDL.

I wait your answer. thanks...

PD: Sorry, but my english is not very good xD

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